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The IUP Journal of Electrical and Electronics Engineering:
Optimization and Synthesis of Combinational Circuits Using Improved mGDI Technique
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The paper presents a new technology for various combinational logic functions and logic circuits with improved design parameters and claimed that improved modified Gate Diffusion Input (mGDI) logic to be much more power and speed efficient than mGDI and Complementary CMOS logic. In synthesis process, area of logical gates is synthesizing which is very useful for further realization of various logic functions. In this paper, area of EXOR and EXNOR are minimized in the form of reduced number of transistors when compared with mGDI technique. Transient analysis of various circuits shows better power dissipation and propagation delay, while power and delay is in trade-off. All simulations are performed in Cadence tool on 90 nm CMOS technology. The simulation results show that this technique is better for designing low power, high speed and small size circuits when compared with the mGDI and CMOS technology.

 
 

In the advent of integrated circuits, digital electronics is more important than analog electronics (Jain, 2003). The increasing demand in digital circuits which has been observed last years in the worldwide market, led the designers taken into account a new objective in the complex digital circuits (Kumar, 2013). Basically, digital circuits are two types: sequential and combinational circuits (Jain, 2003). Speed, power and area are the essential design parameters in digital VLSI circuits (Micheli, 1994). Optimization of these design parameters is very important for fast and low power circuits. Optimization of combinational circuits is a challenging problem in the digital paradigm (Bhadra et al., 2010). Every function is realized by logic gates, if the logic gates are slow in speed and having large power dissipation then the performance of the realized function will be poor. High power dissipation reduces the life time of the battery and decreases the reliability, there is a need of external cooling system to reduce the effect of extra power dissipation but this process increases the complexity of the circuit. As the technology further scale down, according to Moore’s law, number of transistors on a chip are doubled in every 18 months. Various techniques have been introduced to overcome the effect of power dissipation but there is trade-off between power and delay (Leblebici, 1996; and Balasubramanian et al., 2005). In this paper, a new technology has been introduced which overcomes this effect at some extent level.

 
 
 

Electrical and Electronics Engineering Journal, Combinational circuits, Power dissipation, VTCMOS (Variable Threshold CMOS), MTCMOS (Multi Threshold CMOS), Propagation delay, modified Gate Diffusion Input (mGDI), Improved mGDI, Transient analysis