Recently, the focus has shifted to current-mode circuits analog signal
processing, compared to voltage-mode circuits, due to their large dynamic range, better linearity
and excellent frequency response. The current-mode circuits require less number of
active and passive components for the realization of filter functions, compared to
voltage-mode circuits. Also, addition of filter responses in current-mode circuits requires
no additional hardware if taken out from high output impedance sources, and therefore
is economical. Furthermore, current-mode analog signal processing gained attention
due to its suitability towards Integrated Circuit
(IC) fabrication techniques such as Complementary Metal Oxide Semiconductor (CMOS) and Bipolar CMOS
(Bi-CMOS) technologies. Although current-mode filters are realized using Four Terminal
Floating Nullors (FTFN), Current Feedback Operational Amplifiers (CFOA), and
Operational Transconductance Amplifiers (OTA), yet Current Conveyors (CC) enjoy a special
place in the field of analog signal processing due to their inherent advantages of large
dynamic range and wide bandwidth [1-4]. Modern wireless and wire line communication
systems require high-performance analog base band circuits, such as second-generation
Current Conveyors (CCII). Many techniques used to maximize bandwidth of
second-generation CC have been published [5-9]. These papers show the enhancement of bandwidth
of CCII with an extra amount of power consumption and complex circuitry.
In this paper,
a new second-generation Current Conveyor (CMOS CCII) based on
resistive compensation technique is presented. The resistive compensation technique works
with a very simple principle. Since it adds zero frequency to the transfer function of
the current mirror, this process will cancel the effect of parasitic capacitance of the
current mirror on bandwidth of CCII. The primary advantages of resistive
compensation technique are enhanced frequency response, improved slew rate, and settling time of
the CMOS CCII without extra power dissipation. This new design technique of CMOS
CCII exhibits wide bandwidth, high slew rate, and low power consumption. The
simulation results have confirmed the theoretical predictions. |