The IUP Journal of Telecommunications
Design and Implementation of a 32-Bit ALU: A Review

Article Details
Pub. Date : Feb, 2019
Product Name : The IUP Journal of Telecommunications
Product Type : Article
Product Code : IJTC61902
Author Name : Hari Nandan and Pawan Kumar Dahiya
Availability : YES
Subject/Domain : Science & Technology
Download Format : PDF Format
No. of Pages : 11

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Abstract

The paper proposes different techniques to design and implement a 32-bit Arithmetic and Logic Unit (ALU) such as implementation of 32-bit ALU for Digital Signal Processor (DSP) processor core, multifunctional processor, cryptographic processor and Wi-Fi enabled 32-bit ALU, reversible gate, Feedback Switch Logic (FSL) and clock gating. The number of operations increases in ALU, due to which the complexity of operation increases and causes an increase in power consumption also. To reduce the power consumption in ALU, the paper designs the ALU with clock gating. All these designs are implemented on FPGA.


Description

Arithmetic and Logic Unit (ALU) plays a number of arithmetic and logical activities, for example, additive operation, subtractive operation, multiply operation and division for the Central Processing Unit (CPU) of a PC (Ravi et al. 2017). It is a critical building piece of CPU, Floating Point Units (FPUs) and Graphical Processing Units (GPUs) (Mohammad and Abdul, 2015). ALU is the segment of CPU where the genuine work is done (Kuhshboo and Shraddha, 2017). ALU is also used in numerous other gadgets like handheld telephone (Pradnya et al., 2015). However, there are numerous issues in ALU plan, for example, power dissipation and propagation delay, which can be lessened by means of utilizing reversible logic in ALU (Swamynathan and Banumathi, 2017). Also, a Feedback Switch Logic (FSL) is utilized for rapid and low power plan of ALU (Patanjali and Saxena, 2009). The clock gating technique is utilized for low power ALU design because it stopped a portion of circuit which is not performing any active computation selectively; that is the reason it utilizes less power (Liril and Padmaja, 2014). Also, cryptography is utilized for the safe correspondence of information and verification (Bhavina and Vandana, 2010).


Keywords

Arithmetic and Logic Unit (ALU), Reversible gate, Feedback Switch Logic (FSL), Clock gating, Cryptography, FPGA

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