Published Online:April 2026
Product Name:The IUP Journal of Electrical & Electronics Engineering
Product Type:Article
Product Code:IJEEE020426
DOI:10.71329/IUPJEEE/2026.19.2.17-28
Author Name:Arya Naga, Sudip Dogra and Tanushree Ganguli
Availability:YES
Subject/Domain:Engineering
Download Format:PDF
Pages:17-28
Rapid urbanization leads to an increase in the number of vehicles on the roads, enhancing the waiting time at the intersection of the roads. In India, a driver is stuck in the traffic, on average, for about 135 hours per year1. Various measures have been taken to solve this problem already. However, after identifying the loopholes in those measures, the present paper proposes a Field Programmable Gate Array (FPGA)-based traffic light controller system. The system is based on a Finite State Machine (FSM). Additionally, the system integrates emergency buttons, using which a specific node of the road can be controlled, allowing manual override of the signals. It has been developed using Xilinx Vivado with Verilog HDL, and implemented on ZedBoard 7000 FPGA kit.
In the twenty-first century, traffic congestion is a major issue in most countries. In India, where the population is increasing day-by-day, the number of vehicles and the frequency of accidents have also increased, particularly at four-way intersections where collisions are significantly higher.