Published Online:July 2026
Product Name:The IUP Journal of Electrical & Electronics Engineering
Product Type:Article
Product Code:IJEEE010726
DOI:10.71329/IUPJEEE/2026.19.3.6-44
Author Name:A Muthuram Kumar and P Subha Karuvelam
Availability:YES
Subject/Domain:Engineering
Download Format:PDF
Pages:6-44
The paper presents the design, modeling, and experimental validation of an isolated bridgeless interleaved single-ended primary inductance converter (SEPIC) integrated with a synchronous rectifier for high-voltage DC (HVDC), wireless power transfer, and power factor correction (PFC) applications. The proposed converter overcomes the limitations of conventional bridge rectifier topologies by reducing conduction losses, improving conversion efficiency, and providing a wider output voltage range with low output ripple. To further enhance system performance, a modified multilevel inverter (MLI) and zero-voltage switching (ZVS) technique are incorporated into the synchronous rectifier, thereby minimizing switching losses and improving overall efficiency. A mathematical model is developed to derive the duty-cycle-based output feedback control strategy, and the proposed system is implemented and verified using MATLAB/Simulink. An FPGA-based hardware prototype is also developed to validate the simulation results under practical operating conditions. Both simulation and experimental investigations demonstrate the effectiveness of the proposed converter, achieving a reduction in multilevel inverter output variations to approximately 6% within the total harmonic distortion (THD) range while maintaining a near-unity power factor of 0.999.
An electrical power distribution system contains numerous power conversion steps for consumer applications.