June'21


The IUP Journal of Information Technology

ISSN: 0973-2896

A 'peer reviewed' journal indexed on Cabell's Directory, and also distributed by EBSCO and Proquest Database

It is a quarterly journal that publishes research papers on emerging tools, technologies and paradigms relating to various aspects of IT; Programming and Testing tools; Multimedia tools; Image processing and Communication; Neural networks; Big Data, Data Science; Data Analytics; Cognitive Technologies, Artificial Intelligence, Cloud Computing and Edge Computing; E-Commerce; Cyber Security; 5G Technology, Mobile Applications etc.

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Focus Areas
  • Database Systems
  • Programming Languages
  • Software Engineering and Project Management
  • Web Technologies
  • Mobile Computing
  • Network and Distributed Computing
  • Computer Security
  • Intelligent Systems
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Article   Price (₹) Buy
Developing a Classification Model to Identify Rice Plant Diseases Using Fuzzy Color and Texture Features
50
Analysis and Optimization of Groundwater Distribution Using Support Vector Machine and Neural Networks
50
Internet of Things for Smart Cities: Challenges, Security and Privacy Issues
50
Design and Implementation of 16-Bit RISC Processor on Zed Board
50
       
Contents : (June'2021)

Developing a Classification Model to Identify Rice Plant Diseases Using Fuzzy Color and Texture Features
Ananta Charan Ojha and Vinitha C

Rice is one of the oldest and most important cereal grains not only in India but also in the world. Roughly half of the world's population depends on rice every day. The demand for rice will exceed its production in the future as per reports. Diseases in rice plants severely affect the rice yield, thereby increasing the demand and supply gap. It results in significant agricultural and economic losses if timely actions are not taken. Identifying the diseases on time and taking the necessary measures will help reduce this loss. Digital image processing coupled with machine learning techniques can be used to identify rice plant diseases and help farmers address such issues to a great extent. The paper evaluates select machine learning algorithms in the identification and classification of rice plant diseases. The Fuzzy Color and Texture Histogram (FCTH), an unsupervised filter, has been used to extract relevant features from infected leaves of rice plants. Using a dataset from the UCI machine learning repository, experiments have been conducted to study the performance of the classifiers. The experimental results are very impressive and showed that the classification accuracies of the considered algorithms are competitive, with the Neural Network (NN) being slightly better than the rest achieving 89.583% accuracy on the test dataset.


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Article Price : Rs.50

Analysis and Optimization of Groundwater Distribution Using Support Vector Machine and Neural Networks
Akshat Uttam, Simriti Gupta, Priyansh Chaudhary, Stuti Saran and Shankar Sinha

The paper proposes to build a model using machine learning to battle water crisis. The model predicts the groundwater levels of different areas in Delhi with respect to various parameters that affect the groundwater levels in the environment. To find the best machine learning technique to perform the prediction of groundwater, we initially performed a comparative analysis of four machine learning techniques: Support Vector Machine (SVM), Artificial Neural Networks (ANN), random forests and linear regression models. We performed forecasting using the AutoRegressive Integratged Moving Average (ARIMA) model to predict the parameters that affect groundwater levels across the next 10 years. The parameters resulted in increasing the database by two times, hence we performed the prediction of the water level using the models SVM, ANN and linear regression models. The results indicated that the ANN model performs better than the SVM and linear regression models, the mean absolute errors being 85.26, 127.74 and 94.95, respectively. Further, these predictions are used to build optimized groundwater distribution routes using the optimization algorithm Vehicle Routing Problem (VRP). If these routes are implemented using proper infrastructure, we can provide the resource of groundwater to the areas that are experiencing scarcity of water.


© 2021 IUP. All Rights Reserved.

Article Price : Rs.50

Internet of Things for Smart Cities: Challenges, Security and Privacy Issues
Selvakumar Manickam and Afiqah Kooy

Technology has vastly advanced over the years and brought on the birth of new innovations. With the advancement of the Internet of Things (IoT), developing countries all over the world have started adopting smart technologies and promoting interconnectivity with the vision to create smart cities. Smart cities are formed in order to improve quality of life, optimize resources and provide better facilities to the citizens. However, alongside the benefits, there are also many challenges and risks that come along with the implementation, especially regarding privacy and safety. The paper highlights and discusses the challenges, security and privacy issues in the implementation of the IoT for smart cities.


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Article Price : Rs.50

Design and Implementation of 16-Bit RISC Processor on Zed Board
Keshav Sharma and Pawan Kumar Dahiya

The paper designs and implements 16-bit Reduced Instruction Set Computer (RISC) processor. In this design, a 16-bit non-pipelined RISC processor is propositioned, which is cast off transversely across a varied range of stages alike cellular phone, supercomputers, signal processing, etc. The mainframe is made up of the wedges, namely, Instruction Memory (IM), Program Counter (PC), Arithmetic and Logic Unit (ALU), Data Memory (DM), Register File (RF), ALU control, datapath and Control Unit (CU) (Amit and Rita, 2014). The predisposition of the whole structure is in the direction of improving the performance of variable point arithmetic unit thus as the performance of whole RISC processor is amended. The anticipated RISC processor is capable of implementing arithmetic, logical, data transfer, floating point unit, memory, jumping and shifting instruction. In this design, on the one side,we used Harvard architecture that customs discrete memories intended for its instruction and statistics memory, and on the another side, von Neumann architecture shared solitary memory intended for its instruction and data through single statistics and address bus. The design of instruction word length of the processor is 16-bit widespread. This RISC processor supports 16 instruction by means of three addressing approaches. It partakes 16 General Purpose Register (GPR) which stored 16-bit data. Entirely, modules in RISC processor structure are implied in Verilog Hardware Description Language (HDL) (Michael, 2011). The distinct modules are premeditated and verified at each level of execution and lastly cohesive in the topmost level segment by apposite mapping. The RISC processor structure design imitation in Xilinx Vivado 2018.1 then synthesized on ZedBoard. Consequences specify that the anticipated design stands enhanced in speed and in area.


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Article Price : Rs.50

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